Tip 1: Use an LDO regulator to power a 3.3V system from a 5V supply
The standard three-terminal linear regulator typically has a dropout voltage of 2.0-3.0V. To reliably convert 5V to 3.3V, you cannot use them. Low Dropout (LDO) regulators with a dropout voltage of a few hundred millivolts are ideal for this type of application. Figure 1-1 is a block diagram of the basic LDO system with the corresponding currents. As can be seen from the figure, the LDO consists of four main parts:
Turn on the transistor
2. Bandgap reference source
3. Operational Amplifier
4. Feedback resistor divider
When choosing an LDO, it is important to know how to distinguish between various LDOs. The device's quiescent current, package size, and model are important device parameters. Determining various parameters based on the specific application will result in an optimal design.
The quiescent current IQ of the LDO is the ground current IGND of the device when the device is operating at no load. IGND is the current that the LDO uses to regulate. When IOUT>>IQ, the efficiency of the LDO can be approximated by dividing the output voltage by the input voltage. However, at light loads, IQ must be included in the efficiency calculation. LDOs with lower IQ have higher light load efficiency. The increase in light load efficiency has a negative impact on LDO performance. LDOs with higher quiescent currents have a faster response to sudden changes in line and load.
Tip 2 : Low-cost power supply system using Zener diodes
A low-cost regulator solution using a Zener diode is detailed here.
A simple low-cost 3.3V regulator can be fabricated with Zener diodes and resistors, as shown in Figure 2-1. In many applications, this circuit can replace LDO regulators and is cost effective. However, this regulator is more sensitive to loads than LDO regulators. In addition, it is less energy efficient because R1 and D1 always have power consumption. R1 limits the current flowing into D1 and the PICmicro® MCU, keeping VDD within the allowable range. As the current through the Zener diode changes, the reverse voltage of the diode will also change, so the value of R1 needs to be carefully considered.
R1 is selected based on the maximum voltage drop—typically when the PICmicro MCU is running and its output is driven high—the voltage drop across R1 is low enough to allow the PICmicro MCU to have enough voltage to sustain operation. At the same time, at the minimum load—typically when the PICmicro MCU is reset—VDD does not exceed the Zener diode's power rating and does not exceed the PICmicro MCU's maximum VDD.
Tip 3 : A lower cost power supply system with 3 rectifier diodes
Figure 3-1 details a lower cost regulator scheme with three rectifier diodes.
We can also connect several conventional switching diodes in series to reduce the voltage of the incoming PICmicro MCU with its forward voltage drop. This is even lower than the cost of a Zener diode regulator. This design typically consumes less current than a Zener diode.
The number of diodes required varies according to the forward voltage of the selected diode. The voltage drop across diodes D1-D3 is a function of the current flowing through these diodes. R1 is connected to avoid the voltage on the PICmicro MCU VDD pin exceeding the maximum VDD value of the PICmicro MCU when the load is at a minimum—usually when the PICmicro MCU is in Reset or Sleep. Depending on other circuits connected to VDD, the value of R1 can be increased, or even R1 is not needed at all. Diodes D1-D3 are selected based on the maximum voltage drop—typically when the PICmicro MCU is running and its output is driven high—the voltage drop across D1-D3 is low enough to meet the minimum VDD requirement of the PICmicro MCU.
Tip 4 : Use a switching regulator to power the 3.3V system from a 5V supply
As shown in Figure 4-1, the buck switching regulator is an inductor-based converter that reduces the input voltage source to a lower amplitude output voltage. Output regulation is achieved by controlling the turn-on (ON) time of MOSFET Q1. Since the MOSFET is either in a low-impedance state or in a high-impedance state (ON and OFF, respectively), the high input source voltage can be efficiently converted to a lower output voltage.
When Q1 is in these two states, the relationship between the input and output voltages can be established by balancing the voltage-time of the inductor.
For MOSFET Q1, there is the following formula:
When choosing the value of the inductor, it is a good initial choice to make the maximum peak-to-peak ripple current of the inductor equal to 10% of the maximum load current.
When selecting the output capacitor value, a good initial value is: make the LC filter characteristic impedance equal to the load resistance. This way, if the load is suddenly removed during full load operation, the voltage overshoot can be within acceptable limits.
When selecting diode D1, select a component with a sufficient current rating to withstand the inductor current during the pulse period (IL) discharge.
Digital connection
When connecting two devices with different operating voltages, you must know their respective output and input thresholds. Once the threshold is known, the device's connection method can be selected based on the other needs of the application. Table 4-1 shows the output and input thresholds used in this document. When designing a connection, be sure to refer to the manufacturer's data sheet for the actual threshold level.
Tip 5 : 3.3V → 5V direct connection
The easiest and most ideal way to connect a 3.3V output to a 5V input is to connect directly. Direct connection needs to meet the following 2 requirements:
• 3.3V output VOH greater than 5V input VIH
• VOL of 3.3V output is less than 5V input VIL
One example of the ability to use this method is to connect a 3.3V LVCMOS output to a 5V TTL input. It can be clearly seen from the values ​​given in Table 4-1 that the above requirements are met.
3.3V LVCMOS VOH (3.0V) is greater than 5V TTL VIH (2.0V)
And
The VOL (0.5V) of the 3.3V LVCMOS is less than the VIL (0.8V) of the 5V TTL.
If these two requirements are not met, additional circuitry is required to connect the two sections. See tips 6, 7, 8, and 13 for possible solutions.
Tip 6: 3.3V → 5V using MOSFET converter
If the VIH of the 5V input is higher than the VOH of a 3.3V CMOS device, then driving any such 5V input requires additional circuitry. Figure 6-1 shows a low-cost, two-component solution.
When selecting the resistance of R1, two parameters need to be considered, namely: the switching speed of the input and the current consumption on R1. When switching the input from 0 to 1, it is necessary to account for the input rise time due to the RC time constant formed by R1, the input capacitive reactance of the 5V input, and any stray capacitance on the board. The input switching speed can be calculated by:
Since the input capacitive reactance and stray capacitance on the board are fixed, the only way to increase the input switching speed is to lower the resistance of R1. Lowering the value of R1 to obtain a shorter switching time is at the expense of increasing the current consumption when the 5V input is low. In general, switching to 0 is much faster than switching to 1 because the on-resistance of the N-channel MOSFET is much smaller than R1. In addition, when selecting an N-channel FET, the VGS of the selected FET should be lower than the VOH of the 3.3V output.
Tip 7: 3.3V→5V using diode compensation
Table 7-1 lists the input voltage thresholds for 5V CMOS, 3.3VLVTTL, and the output drive voltage for LVCMOS.
As seen from the above table, the high and low input voltage thresholds of the 5V CMOS input are about one volt higher than the 3.3V output threshold. Therefore, even if the output from the 3.3V system can be compensated, there is little or no room for noise or component tolerance. What we need is a circuit that compensates for the output and increases the high and low output voltage differences.
Once the output voltage specification is determined, it has been assumed that the high output drives the load between the output and ground, while the low output drives the load between 3.3V and the output. If the high voltage threshold load is actually between the output and 3.3V, then the output voltage is actually much higher, because the mechanism for pulling the output is the load resistor, not the output transistor.
If we design a diode compensation circuit (see Figure 7-1), the forward voltage of diode D1 (typically 0.7V) will cause the output to rise at a low voltage, resulting in a low voltage of 1.1V to 1.2V at the 5V CMOS input. It is safely below the low input voltage threshold of the 5V CMOS input. The output high voltage is determined by a pull-up resistor and a diode D2 connected to a 3.3V supply. This allows the output high voltage to be approximately 0.7V higher than the 3.3V supply, which is 4.0 to 4.1V, safely above the 5V CMOS input threshold (3.5V).
Note: For the circuit to work properly, the pull-up resistor must be significantly less than the input resistance of the 5V CMOS input to avoid a drop in the output voltage due to the input resistor divider effect. The pull-up resistor must also be large enough to ensure that the current loaded on the 3.3V output is within device specifications.
Tip 8 : 3.3V → 5V using voltage comparator
The basic work of the comparator is as follows:
• When the inverting (-) input voltage is greater than the in-phase (+) input voltage, the comparator output switches to Vss.
• When the in-phase (+) input voltage is greater than the inverting (-) input voltage, the comparator output is high.
In order to maintain the polarity of the 3.3V output, the 3.3V output must be connected to the non-inverting input of the comparator. The inverting input of the comparator is connected to the reference voltage determined by R1 and R2, as shown in Figure 8-1.
Calculate R1 and R2
The ratio of R1 to R2 depends on the logic level of the input signal. For a 3.3V output, the inverting voltage should be placed at the midpoint voltage between VOL and VOH. For LVCMOS outputs, the midpoint voltage is:
If the logic levels of R1 and R2 are as follows,
If R2 takes the value 1K, then R1 is 1.8K.
An appropriately connected op amp can be used as a comparator to convert a 3.3V input signal to a 5V output signal. This takes advantage of the comparator's characteristic that the comparator forces the output to a high (VDD) or low (Vss) level based on the magnitude of the voltage difference between the "inverted" input and the "in-phase" input.
Note: For the op amp to operate properly at 5V, the output must have rail-to-rail drive capability.
Tip 9: 5V → 3.3V direct connection
Typically, a 5V output has a VOH of 4.7 volts and a VOL of 0.4 volts. Typically, a 3.3V LVCMOS input has a VIH of 0.7 x VDD and a VIL of 0.2 x VDD.
When the 5V output drive is low, there is no problem because the 0.4 volt output is less than the 0.8 volt input threshold. When the 5V output is high, the 4.7 volt VOH is greater than 2.1 volts VIH, so we can connect the two pins directly without conflict, provided the 3.3V CMOS output can withstand 5 volts.
If the 3.3V CMOS input cannot withstand 5 volts, then a problem will occur because the maximum voltage specification for the input is exceeded. See Tips 10-13 for possible solutions.
Tip 10 : 5V → 3.3V using diode clamp
Many manufacturers use clamp diodes to protect the device's I/O pins from voltages on the pins that exceed the maximum allowable voltage specification. The clamp diode keeps the voltage on the pin from falling below Vss by more than one diode drop and not above VDD by more than one diode drop. To use a clamp diode to protect the input, still pay attention to the current flowing through the clamp diode. The current flowing through the clamp diode should always be small (on the order of microamps). If the current flowing through the clamp diode is too large, there is a danger of component blocking. Since the source resistance of the 5V output is typically around 10Ω, a resistor is still connected in series to limit the current flowing through the clamp diode, as shown in Figure 10-1. The consequence of using a series resistor is to reduce the speed of the input switch because the RC time constant is formed on the pin (CL).
If you do not have a clamping diode, you can add an external diode to the current, as shown in Figure 10-2.
Tip 10: A 5V → 3.3V active clamp
One problem with using diode clamps is that it will inject current into the 3.3V supply. In designs with high current 5V output and lightly loaded 3.3V rails, this current injection may cause the 3.3V supply voltage to exceed 3.3V. To avoid this problem, a triode can be used instead, and the triode causes excess output drive current to flow to ground instead of the 3.3V supply. The designed circuit is shown in Figure 11-1.
The base-emitter junction of Q1 acts the same as the diode in the diode clamp circuit. The difference is that only a few percent of the emitter current flows out of the base into the 3.3V rail, and most of the current flows to the collector, and then flows harmlessly from the collector into the ground. The ratio of the base current to the collector current is determined by the current gain of the transistor, typically 10-400, depending on the transistor used.
Tip 12: 5V → 3.3V resistor divider
A simple resistor divider can be used to reduce the output of a 5V device to a level suitable for a 3.3V device input. The equivalent circuit of this interface is shown in Figure 12-1.
In general, the source resistance RS is very small (less than 10 Ω), and if the selected R1 is much larger than RS, then the effect of RS on R1 can be ignored. At the receiving end, the load resistance RL is very large (greater than 500 kΩ). If the selected R2 is much smaller than RL, then the effect of RL on R2 can be ignored.
There is a trade-off between power consumption and transient time. In order to minimize the power requirements of the interface current, the series resistors R1 and R2 should be as large as possible. However, the load capacitance (composed by the stray capacitance CS and the input capacitance CL of the 3.3V device) can adversely affect the rise and fall times of the input signal. If R1 and R2 are too large, the rise and fall times may be too long to be acceptable.
If the effects of RS and RL are ignored, then the equations for determining R1 and R2 are given by Equation 12-1 below.
Equation 12-2 gives the formula for determining the rise and fall times. To facilitate circuit analysis, the Thevenin equivalent calculation is used to determine the applied voltage VA and the series resistance R. The Thevenin equivalent calculation is defined as the open circuit voltage divided by the short circuit current. According to the limits imposed by Equation 12-2, for the circuit shown in Figure 12-1, the determined Thevenin equivalent resistance R should be 0.66*R1 and the Thevenin equivalent voltage VA should be 0.66*VS.
For example, suppose the following conditions exist:
• Stray capacitance = 30 pF
• Load capacitance = 5 pF
• Maximum rise time from 0.3V to 3V ≤ 1 μs
• External source voltage Vs = 5V
The calculation of the maximum resistance is shown in Equation 12-3.
Tip 13: 3.3V → 5V level shifter
Although level shifting can be done discretely, it is often more popular to use an integrated solution. Level shifters are used in a wide range of applications: one-way and two-way configurations, different voltage transitions and different speeds for the user to choose the best solution.
Board-level communication between devices (for example, MCU to peripherals) is done via SPI or I2CTM, which is the most common. For SPI, a unidirectional level shifter is appropriate; for I2C, a two-way solution is required. Figure 13-1 below shows these two solutions.
simulation
The final challenge of the 3.3V to 5V interface is how to convert the analog signal across the power barrier. Low-level signals may not require external circuitry, but systems that transmit signals between 3.3V and 5V are subject to power supply variations. For example, in a 3.3V system, the ADC converts a 1V peak analog signal with a higher resolution than the ADC conversion in a 5V system because more of the ADC range is used for conversion in a 3.3V ADC. On the other hand, the relatively high signal amplitude in a 3.3V system may conflict with the lower common-mode voltage limit of the system.
Therefore, in order to compensate for the above differences, some kind of interface circuit may be required. This section discusses interface circuits to help alleviate the problem of signal transitions between different power supplies.
Tip 14: 3.3V → 5V analog gain module
When connecting from a 3.3V power supply to 5V, the analog voltage needs to be boosted. The 33 kΩ and 17kΩ resistors set the gain of the op amp so that full scale is used at both ends. The 11 kΩ resistor limits the current flowing back to the 3.3V circuit.
Tip 15: 3.3V→5V analog compensation module
This module is used to compensate for analog voltages from 3.3V to 5V. The following is the conversion of the analog voltage supplied from a 3.3V power supply to a 5V power supply. The 147 kΩ, 30.1 kΩ resistor on the top right and the +5V supply are equivalent to a 0.85V supply with a 25 kΩ resistor in series. This equivalent 25 kΩ resistor, three 25 kΩ resistors, and an op amp form a differential amplifier with a gain of 1 V/V. The 0.85V equivalent voltage source translates any signal present at the input up the same amplitude up; the signal centered at 3.3V/2 = 1.65V will be centered at 5.0V/2 = 2.50V. The resistor on the upper left limits the current from the 5V circuit.
Tip 16: 5V → 3.3V active analog attenuator
This technique uses an op amp to attenuate the signal amplitude from a 5V to 3.3V system.
The easiest way to convert a 5V analog signal to a 3.3V analog signal is to use a resistor divider with a R1:R2 ratio of 1.7:3.3. However, there are some problems with this approach.
1) The attenuator may be connected to a capacitive load to form an undesired low pass filter.
2) The attenuator circuit may need to drive a low impedance load from a high impedance source.
In either case, an op amp is needed to buffer the signal.
The desired op amp circuit is a unity gain follower (see Figure 16-1).
The circuit output voltage is the same as the voltage applied to the input.
In order to convert the 5V signal to a lower 3V signal, we only need to add a resistor attenuator.
If the resistor divider is placed before the unity gain follower, it will provide the lowest impedance for the 3.3V circuit. In addition, the op amp can be powered from 3.3V, which will save some power. If the selected X is very large, the power consumption on the 5V side can be minimized.
If the attenuator is behind a unity gain follower, then there is the highest impedance for the 5V source. The op amp must be powered from 5V and the impedance on the 3V side will depend on the value of R1||R2.
Tip 17: 5V → 3.3V analog limiter
When transferring a 5V signal to a 3.3V system, the attenuation can sometimes be used as a gain. If the desired signal is less than 5V, then sending the signal directly to the 3.3V ADC will result in a larger conversion value. Danger occurs when the signal is close to 5V. Therefore, there is a need to control the voltage overshoot without affecting the voltage in the normal range. Three implementation methods are discussed here.
1. Using a diode, clamp the overvoltage to a 3.3V supply system.
2. Use a Zener diode to clamp the voltage to any desired voltage limit.
3. Use an op amp with a diode for precise clamping.
The easiest way to perform voltage clamping is the same as the simple method of connecting a 5V digital signal to a 3.3V digital signal. Use resistors and diodes to allow excess current to flow into the 3.3V supply. The resistor value chosen must protect the diode and 3.3V supply without negatively impacting analog performance. If the impedance of the 3.3V supply is too low, this type of clamp can cause the 3.3V supply voltage to rise. Even if the 3.3V supply has a very good low impedance, when the diode is on, and at a high enough frequency, when the diode is not conducting (due to parasitic capacitance across the diode), such a clamp will make the input The signal applies noise to the 3.3V supply.
In order to prevent the input signal from affecting the power supply, or to make the input more comfortable when dealing with large transient currents, the above method is slightly changed, and the Zener diode is used instead. Zener diodes are typically slower than the fast signal diodes used in the first circuit. However, Zener clamps are generally more robust, and clamps do not depend on the characteristics of the power supply. The size of the clamp depends on the current flowing through the diode. This is determined by the value of R1. R1 is not required if the output impedance of the VIN source is large enough.
If you need a more accurate overvoltage clamp that does not depend on the power supply, you can use an op amp to get a precision diode. The circuit is shown in Figure 17-3. The op amp compensates for the forward voltage drop of the diode so that the voltage is clamped to the supply voltage of the non-inverting input of the op amp. If the op amp is rail-to-rail, it can be powered from 3.3V.
Since the clamp is performed by an op amp, it does not affect the power supply.
The op amp does not improve the impedance present in the low voltage circuit, and the impedance is still R1 plus the source circuit impedance.
Tip 18 : Driving Bipolar Transistors
When driving a bipolar transistor, the base "drive" current and forward current gain (Î’/hFE) will determine how much current the transistor will sink. If the transistor is driven by the microcontroller I/O port, the base voltage is calculated using the port voltage and the upper port current (typically 20 mA). If 3.3V technology is used, the base current limiting resistor with a lower value should be used to ensure that there is enough base drive current to saturate the transistor.
The value of RBASE depends on the microcontroller supply voltage. Equation 18-1 shows how to calculate RBASE.
If a bipolar transistor is used as a switch to turn the load controlled by the microcontroller I/O port pins on or off, the minimum hFE specification and margin should be used to ensure full saturation of the device.
3V technology example:
For these two examples, it is good practice to increase the base current margin. Driving a 1mA base current to 2 mA ensures saturation, but at the expense of increased input power.
Tip 19: Driving an N-Channel MOSFET Transistor
Care must be taken when selecting an external N-channel MOSFET for use with a 3.3V microcontroller. The MOSFET gate threshold voltage indicates the ability of the device to fully saturate. For 3.3V applications, the rated on-resistance of the selected MOSFET should be for a gate drive voltage of 3V or less. For example, for a 100 mA load with a 3.3V drive, a FET with a nominal drain current of 250 μA does not necessarily provide satisfactory results when the gate-source is applied with 1V. When switching from 5V to 3V, the gate-source threshold and on-resistance characteristics should be carefully examined, as shown in Figure 19-1. A slight reduction in the gate drive voltage can significantly reduce the leakage current.
For MOSFETs, low-threshold devices are more common and have a drain-to-source voltage rating below 30V. MOSFETs with a drain-source rated voltage greater than 30V typically have a higher threshold voltage (VT).
As shown in Table 19-1, the threshold voltage of this 30V N-channel MOSFET switch is 0.6V. The MOSFET's rated resistance is 35 mΩ when the gate is applied with 2.8V, making it ideal for 3.3V applications.
For the specifications in the IRF7201 data sheet, the minimum gate threshold voltage is specified as 1.0V. This does not mean that the device can be used to switch current at 1.0V gate-to-source voltage, as there is no specification for VGS (th) below 4.5V. For 3.3V drives requiring low switching resistance, the IRF7201 is not recommended, but it can be used in 5V drive applications.
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